1. Field of the Invention
The present invention relates to a method of manufacturing a semiconductor package that has through electrodes.
2. Description of Related Art
With the increasing sophistication of electrical equipment such as mobile telephones in recent years, there is a demand for further increases in the speed and performance of electronic devices and the like that are used in the equipment. In order to meet these demands, technical development is required not only to increase the speed of the device itself through miniaturization and the like, but also to increase the speed and density of the package of the device.
For technologies that achieve high-density mounting, three-dimensional stacking technology that laminates and mounts chips by providing fine through-electrodes in the chips and System in Package (SIP) technology that uses a substrate having through-electrodes formed therein have been proposed. Research and development of through-electrode formation technology and through-electrode substrate formation technology for realizing these mounting technologies have been conducted (for example, refer to related art Japanese Unexamined Patent Application, First Publication No. 2002-158191).
Also, as a microvia-formation technology, research has been conducted for forming microvias by transforming the substrate interior by a laser or the like and removing the transformed portion by etching (for example, refer to related art Japanese Unexamined Patent Application, First Publication No. 2006-303360).
Thinning of the substrate by polishing the rear surface of the substrate in order to reduce the size of the package has also been conducted. Also, in order to solve problems related to handling or the like during the thinning process, a method of joining a holding substrate to a substrate and polishing the silicon on the rear surface of the substrate has been proposed (for example, refer to related art Japanese Unexamined Patent Application, First Publication No. 2006-228947).
The abovementioned holding substrate is used, for example, when thinning the substrate, but is removed upon the completion of thinning the substrate. Also, with regard to a substrate in which through-electrodes are formed, a process for joining the manufactured substrate together with a substrate in which a functional element is arranged is required. Thus, the manufacturing time increases. Since the method disclosed in related art Japanese Unexamined Patent Application, First Publication No. 2006-228947 involves removing the holding substrate that was joined for thinning a substrate and laminating again a substrate for forming through electrodes, the manufacturing time increases.
The present invention was made in view of the related circumstances, and has an object of providing a method of manufacturing a semiconductor package that eliminates the need for removing the holding substrate after the completion of processing of the semiconductor substrate and is thereby capable of reducing the manufacturing time.